Applications where the system frequency is dynamically varied in a system operated in a clocked manner, for example to comply with the temporally changing requirements on computing speeds, are numerous. For example, one much-advertised design feature of modern microprocessors is that the same can vary their internal clock frequency depending on the currently occurring processor load in order to reduce the energy consumption of the overall system in a state of lower clock frequency. The energy consumption of the microprocessor is thereby approximately linearly scaled with the used clock frequency, since energy is always consumed when transistors change their switching state, which, for microprocessors and registers, is typically the case once per clock cycle.
In the known methods, the clock frequency of such a system is either increased jump-wise from the current actual frequency to the set frequency, or in several subsequent equidistant clock frequency jumps (linear ramping). One problem with increasing the clock frequency is that the current consumers operated in a clocked manner have to be supplied with a supply voltage to ensure their operability. If the clock frequency is increased, the current consumer requires more current within fractions of a second, since the same scales with the clock frequency, as has been described above. Thus, generally, a supply voltage provided by a voltage regulator will show a voltage drop at a clock frequency increase. Its amount depends on the amount of the changing load, thus on the clock frequency change. If the amount of the clock frequency change per time unit (characteristic control time of the voltage regulator) is too high, it can happen that the voltage drop is so strong that a minimum supply voltage absolutely required for the operation of the current consumer is fallen below. In the worst case, the current consumer is turned off or a reset of a processor is triggered or required, respectively. In the extreme case, this can cause immediate data loss.
When varying the clock frequency of a current consumer operated in a clocked manner, it has to be considered on the one hand that the clock frequency increase has to be performed as fast as possible to ensure the desired operation of a system, but on the other hand the same may not be performed so fast that the current consumer is non-functional due to the lack of sufficient provided electric power.
The known jump-wise switching, which means the variation from the actual frequency to the set frequency in a single step has the great disadvantage that the power drop or voltage drop, respectively, triggered by the clock frequency increase is maximum. In order to ensure the operation of the current consumer at such a frequency variation, the power or voltage supply has to be dimensioned so generously that the same can regulate the maximum clock frequency jump and the resulting high change of the load within the tolerance parameters of the system in the worst operating case. Thus, extremely load-stable and large voltage regulators that are expensive to implement are required in order to tolerate the respective jump-wise increase or reduction of the clock frequency implemented, for example, via fixed frequency dividers, even in a worst-case scenario. The same problem occurs when decreasing the clock frequency, wherein typically overvoltage is generated, which can affect the operability of a clocked current consumer in a similar way as an undervoltage.
In the known methods, which linearly increase the clock frequency from an actual frequency to a set frequency, which means in several single steps per time unit (i.e. with constant Δf/Δt), it is a great disadvantage that the frequency change per step (Δf) also has to be adapted to the worst case, so that in operating states of the current consumer that do not correspond to the worst-case operating state, a clock frequency increase or reduction can only be accomplished with a speed that is lower than the maximum possible speed. This can possibly have the effect that a processor cannot maintain the desired functionality in a real time system.